MINO-o'-2016 11. FW(5)
初期化部分。
#define CMD_KEY_C_DOWN 0 #define CMD_KEY_CS_DOWN 1 #define CMD_KEY_D_DOWN 2 #define CMD_KEY_DS_DOWN 3 #define CMD_KEY_E_DOWN 4 #define CMD_KEY_F_DOWN 5 #define CMD_KEY_FS_DOWN 6 #define CMD_KEY_G_DOWN 7 #define CMD_KEY_GS_DOWN 8 #define CMD_KEY_A_DOWN 9 #define CMD_KEY_AS_DOWN 10 #define CMD_KEY_B_DOWN 11 #define CMD_KEY_C2_DOWN 12 #define CMD_KEY_C_UP 16 #define CMD_KEY_CS_UP 17 #define CMD_KEY_D_UP 18 #define CMD_KEY_DS_UP 19 #define CMD_KEY_E_UP 20 #define CMD_KEY_F_UP 21 #define CMD_KEY_FS_UP 22 #define CMD_KEY_G_UP 23 #define CMD_KEY_GS_UP 24 #define CMD_KEY_A_UP 25 #define CMD_KEY_AS_UP 26 #define CMD_KEY_B_UP 27 #define CMD_KEY_C2_UP 28 #define CMD_KEY_OCTDOWN_DOWN 32 #define CMD_KEY_OCTUP_DOWN 33 #define CMD_KEY_OCTDOWN_UP 34 #define CMD_KEY_OCTUP_UP 35 #define DIGIT_0 (~0x3f) #define DIGIT_1 (~0x06) #define DIGIT_2 (~0x5b) #define DIGIT_3 (~0x4f) #define DIGIT_4 (~0x66) #define DIGIT_5 (~0x6b) #define DIGIT_6 (~0x7b) #define DIGIT_7 (~0x27) #define DIGIT_8 (~0x7f) #define DIGIT_9 (~0x6f) #define DIGIT_NONE (~0x00) #define DIGIT_CAPO (~0x3f) #define DIGIT_C (~0x58) #define DIGIT_MINUS (~0x40) #define DIGIT_DOT (~0x80) static const uint8_t display[20] = { DIGIT_MINUS, DIGIT_1, DIGIT_NONE, DIGIT_0, DIGIT_NONE, DIGIT_1, DIGIT_NONE, DIGIT_2, DIGIT_NONE, DIGIT_3, DIGIT_NONE, DIGIT_4, DIGIT_NONE, DIGIT_5, DIGIT_NONE, DIGIT_6, DIGIT_NONE, DIGIT_7, DIGIT_NONE, DIGIT_8 }; static volatile uint8_t current_octave = 5; static volatile uint8_t send_buffer[256]; static volatile uint8_t send_buffer_head = 0; static volatile uint8_t send_buffer_len = 0; static volatile uint8_t cmd_buffer[256]; static volatile uint8_t cmd_buffer_head = 0; static volatile uint8_t cmd_buffer_len = 0; static volatile uint8_t current_adc = 0; int main(){ // init // port io DDRB = 0x2f; // PB[01235] = OUT PORTB= 0x11; // PB0=H, PB1,2,3,5=L, PB4=PullUp DDRC = 0x00; PORTC= 0x1f; // PC[0:4] PullUP DDRD = 0xff; PORTD= 0xfe; // PD0=L,PD1=H,PD[23]=H,PD[4:7]=H // ADC ADMUX = _BV(REFS0) | _BV(ADLAR) | _BV(MUX2) | _BV(MUX0); // AVcc/LEFT/PC5 ADCSRA = _BV(ADEN)|_BV(ADPS2);// Enable,/16,NO_INTR,NO_AUTO DIDR0 = _BV(ADC5D); // PC5 // SPI SPCR = _BV(SPE)|_BV(MSTR)|_BV(CPOL)|_BV(CPHA);//Enable,Master,Mode,/4 // UART UCSR0B = _BV(TXEN0); // TxEN,RxDisable,8bit UCSR0C = _BV(UCSZ01)|_BV(UCSZ00); // 8N1 UBRR0H = 0; UBRR0L = 15; // 31250baud // SLEEP set_sleep_mode( SLEEP_MODE_IDLE ); sleep_enable(); // TIMER0 TCCR0A = 0x00; // MODE=normal TIMSK0 = _BV(TOIE0); // OVF_INTR, NO_COMPs TCNT0 = 0; TCCR0B = _BV(CS00); // mode=normal,CLK=/1(START!) // sei();
- 12/22 volatile付け忘れ修正
- 12/24 ↑の直しの際にコピペミスった点修正
